We describe an analog-VLSI neural network for face recognition based on subspace methods. The system uses a dimensionality-reduction network whose coefficients can be either programmed or learned on-chip to perform PCA, or programmed to perform LDA. A second network with user-programmed coefficients performs classification with Manhattan distances. The system uses on-chip compensation techniques to reduce the effects of device mismatch. Using the ORL database with 12 × 12-pixel images, our circuit achieves up to 85% classification performance (98% of an equivalent software implementation).
|Publication status||Published - 1 Dec 2009|
|Event||conference - |
Duration: 1 Dec 2009 → …
|Period||1/12/09 → …|
Carvajal, G., Valenzuela, W., & Figueroa, M. (2009). Advances in Neural Information Processing Systems 20 - Proceedings of the 2007 Conference. Paper presented at conference, . https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84858780509&origin=inward